1. Field of the Invention
The present invention relates to a method of writing fine patterns such as semiconductor integrated circuits with electron beams. Particularly, this invention relates to an electron beam lithography method and apparatus which can compensate proximity effects occurring on patterns to be written, by efficiently calculating optimum emission quantities of electron beams.
2. Description of the Prior Art
In recent years, various electron beam lithography systems are employed to write fine patterns on samples such as semiconductor wafers.
In writing a pattern on a sample with the electron beam lithography system, a part of the sample that shall not be exposed to electron beams is covered with resist, and the electron beams are emitted towards the sample. Electrons emitted towards the sample collide with nuclei, etc., of the sample and scatter. This is called backward scattering. The scattered electrons expose the part of the sample covered with the resist. This is called the proximity effect. The proximity effect may change the shape and dimensions of the part of the sample under the resist from those required.
To compensate the proximity effect, there is an emission quantity correction technique. In writing each of shapes involved in a pattern using electron beams, this technique takes into consideration the backward scattering of electrons due to the shapes surrounding the shape in question. According to the sizes and concentration of the surrounding shapes, electron beam emission quantities for the shape to be written is adjusted.
To determine the electron beam emission quantities, the emission quantity correction technique conventionally employs a matrix. The matrix expresses relations between the electron beam emission quantities and the exposure amounts at respective positions in the pattern. By calculating an inverse matrix of the matrix, optimum electron beam emission quantities for the respective positions are obtained. If this matrix is directly applied for VLSI patterning, a time necessary for calculating the inverse matrix may increase to several hundred hours, even with a very high speed computer. Due to this long calculation time, it is practically impossible to apply the conventional matrix technique for LSIs and VLSIs to correct electron beam emission quantities and compensate the proximity effects in patterning the LSIs and VLSIs.